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august 2010 FD2000 ( lcd display driver ) users manual revision 1 . 0 www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 2 / 3 7 contents 1. overview ................................ ................................ ................................ ................................ ............................ 4 2. features ................................ ................................ ................................ ................................ ............................. 4 3. block diagram ................................ ................................ ................................ ................................ .................. 5 4. pin assignments ................................ ................................ ................................ ................................ ............... 6 4.1. 80 - m qfp - 1420 ................................ ................................ ................................ ................................ ................ 6 4.2. 80 - l qfp - 1212 ................................ ................................ ................................ ................................ ................. 7 5. pin descriptions ................................ ................................ ................................ ................................ .............. 8 6. block functions ................................ ................................ ................................ ................................ .............. 9 6.1. ac ( a ddress counter) ................................ ................................ ................................ ................................ ....... 9 6.2. dcram ( da ta control ram) ................................ ................................ ................................ ............................ 9 6.3. adram ( a dditiona l data ram) ................................ ................................ ................................ ...................... 10 6.4. cgrom (character generator rom) ................................ ................................ ................................ ............ 11 6.5. cgram (character generator ram) ................................ ................................ ................................ ............. 11 7. reset function ................................ ................................ ................................ ................................ ............. 12 8. serial data transfer format ................................ ................................ ................................ ................. 13 9. instruction table ................................ ................................ ................................ ................................ ......... 14 10. detailed instruction descriptions ................................ ................................ ................................ .... 15 10.1. set display technique D sets the display technique ................................ ................................ ................... 15 10.2. display on/off control D turns the display on or off ................................ ................................ .................... 15 10.3. display shift D shifts the display ................................ ................................ ................................ ................. 16 1 0.4. set ac address D specifies the dcram and adram address for ac ................................ ..................... 17 10.5. dcram data write D specifies the dcram address and stores data at that address .............................. 17 10.6. adram data write D specifies the adram address and stores data at that address .............................. 19 10.7. cgram data write D specifies the cgram address and stores data at th at address ............................. 21 11. notes on the power o n and power off sequ ences ................................ ................................ .... 22 12. lcd drive techni que ................................ ................................ ................................ ................................ .. 23 12.1. 1/8 d uty, 1/4 b ias d rive t echnique ................................ ................................ ................................ ................ 23 12.2. 1/9 d uty, 1/4 b ias d rive t echnique ................................ ................................ ................................ ................ 24 12.3. 1/10 d uty, 1/4 b ias d rive t echnique ................................ ................................ ................................ .............. 25 13. sample application c ircuit ................................ ................................ ................................ ..................... 26 13.1. 1/8 d uty, 1/4 b ias d rive (for use with normal panels) ................................ ................................ .................. 26 13.2. 1/8 d uty, 1/4 b ias d rive (for use with large panels) ................................ ................................ ..................... 26 13.3. 1/9 d uty, 1/4 b ias d rive (for use with normal panels) ................................ ................................ .................. 27 13.4. 1/9 d uty, 1/4 b ias d rive (for use with large panels) ................................ ................................ ..................... 27 13.5. 1/10 d uty, 1/4 b ias d rive (for use with normal panels) ................................ ................................ ................ 28 13.6. 1/10 d uty, 1/4 b ias d rive (for use with large panels) ................................ ................................ ................... 28 www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 3 / 3 7 14. sample correspondenc e between instructio ns and the display ................................ ........ 29 15. FD2000 character font (standard) ................................ ................................ ................................ ..... 31 16. electrical characteristics ................................ ................................ ................................ .................. 32 16.1. absolute m aximum r atings ................................ ................................ ................................ ........................... 32 16.2. allowable o perating r anges ................................ ................................ ................................ .......................... 33 16.3. electrical c haracteristics in the a llowabl e o perating r anges ................................ ................................ ........ 34 17. package dimensions ................................ ................................ ................................ ................................ ... 36 17.1. 80 - m qfp - 1420 ................................ ................................ ................................ ................................ ............ 36 17.2. 80 - l qfp - 1212 ................................ ................................ ................................ ................................ ............. 37 www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 4 / 3 7 1 . overview the FD2000 is 1/8 to 1/10 duty dot matrix lcd display controller/drivers that support s the display of characters, numbers, and symbols. in addition to generating dot matrix lcd drive signals based on data transferred serially from a microcontroller, the FD2000 also provide on - chip character display rom and ram to allow display systems to be implemented easily. 2 . features ? controls and drives a 5 x 7, 5 x 8, or 5 x 9 dot matrix l cd. ? supports accessory display segment drive (up to 60 segments) ? display technique 1/8 duty 1/4 bias drive (5 x 7 dots) 1/9 duty 1/4 bias drive (5 x 8 dots) 1/10 duty 1/4 bias drive (5 x 9 dots) ? display digits 12 digits x 1 line (5 x 7 dots) 11 digits x 1 line (5 x 8 or 5 x 9 dots) ? display control memory cgrom: 240 characters (5 x 7, 5 x 8, or 5 x 9 dots) cgram: 16 characters (5 x 7, 5 x 8, or 5 x 9 dots) adram: 12 x 5 bits dcram: 48 x 8 bits ? instruction function d isplay on/off control display shift function ? provides a backup function based on low power modes ? serial data input support ? independent lcd drive block power supply vlcd ? provides a res etb pin for lsi internal initialization ? rc oscillator circuit www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 5 / 3 7 3 . block diagram www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 6 / 3 7 4 . pin assignments 4 .1 . 80 - m qfp - 1420 fd 2000 ( 80 - mqfp - 1420 ) 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 com 4 com 3 com 2 com 1 di cl vss osco osci resetb vlcd vlcd 1 vlcd 2 vlcd 3 ce vdd s 40 s 35 s 36 s 38 s 25 s 26 s 27 s 28 s 29 s 31 s 32 s 30 s 37 s 33 s 34 s 39 www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 7 / 3 7 4 .2 . 80 - l qfp - 1212 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 6 0 5 9 5 8 5 7 5 6 5 5 5 4 5 3 5 2 5 1 5 0 4 9 4 8 4 7 4 6 4 5 4 4 4 3 4 2 4 1 s 4 3 s 4 4 s 2 2 s 2 1 s 4 s 3 s 2 0 s 1 5 s 1 6 s 1 8 s 5 s 6 s 7 s 8 s 9 s 1 1 s 1 2 s 1 0 s 1 7 s 1 3 s 1 4 s 1 9 s 4 5 s 4 6 s 4 7 s 4 8 s 6 0 / c o m 9 s 5 9 / c o m 1 0 s 5 4 s 5 5 s 5 6 s 5 7 s 5 0 s 5 1 s 5 2 s 5 3 s 5 8 s 4 9 c o m 7 c o m 8 www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 8 / 3 7 5 . pin descriptions pin names pin no. pin description a ctive i/o handling whe n unused s1 - s58 1 - 58 (79,80, 1 - 56) s59/com10 59(57) s60/com9 60(58) segment driver outputs. the s59/com10 and s60/com9 pins can be used as common driver outputs under the set display technique instruction. - o o pen com1 - com8 68 - 61 (66 - 59) common driver outputs . - o open osci 76(74) - i gnd osco 75(73) oscillator connections. an oscillator circuit is formed by connecting an external resistor and capacitor at these pins. - o open ce 78(76) chip enable h i cl 79(77) synchronization clock i di 80(78) serial data transfer inputs. these pins are c onnected to the microcontroller. transfer data - i gnd resetb 77(75) reset signal input. ? when res etb is low (v ss ): ? display off s1 to s58 = l (v ss ). s59/com10 and s60/com9 = l (v ss ). com1 to com8 = l (v ss ). ? serial data transfer is disabled. ? the osci/osco pin oscillator is stopped. ? when res etb is high (v dd ): ? display on after a display on/off control (display on state setting) instruction is executed. ? serial data tran sfers are enabled. ? the osci/osco pin oscillator operates. l i gnd v lcd1 71(69) used for applying the lcd drive 3/4 bias voltage externally. - i open v lcd2 72(70) used for applying the lcd drive 2 /4 bias voltage externally. - i open v lcd3 73(71) used f or applying the lcd drive 1 /4 bias voltage externally. - i open v dd 69(67) logic block power supply connection. provide a voltage of between 2.7 and 6.0 v. - - - v lcd 70(68) lcd driver block power supply connection. provide a voltage of between 4.5 and 1 0.0 v. - - - v ss 74(72) power supply connection. connect to ground. - - - note : parentheses indicate pin number for 8 0 - l qfp - 1212 package. www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 9 / 3 7 6 . block function s 6.1. ac (address counter) ac is a counter that provides the addresses used for dcram and adram. the address is automatically modified internally, and the lcd display state is retained . 6.2. dcram (data control ram) dcram is ram that is used to store display data expressed as 8 - bit character codes. (these character codes are converted to 5 x 7, 5 x 8, or 5 x 9 dot matrix character patterns using cgrom or cgram.) dcram has a capacity of 48 x 8 bits, and can hold 48 characters. the table below lists the correspondence between the 6 - bit dcram address loaded into ac and the display position on the lcd pa nel. ? when the dcram address loaded into ac is 00 h . display digit 1 2 3 4 5 6 7 8 9 10 11 12 dcram address(hex) 00 01 02 03 04 05 06 07 08 09 0a 0b however, when the display shift is performed by specifying mdata, the dcram address shifts as shown below. di splay digit 1 2 3 4 5 6 7 8 9 10 11 12 dcram address(hex) 01 02 03 04 05 06 07 08 09 0a 0b 0c (left shift ) display digit 1 2 3 4 5 6 7 8 9 10 11 12 dcram address(hex) 2f 00 01 02 03 04 05 06 07 08 09 0a ( right shift ) note: the dcram addresses are e xpressed in hexadecimal. lsb msb dcram address da0 da1 da2 da3 da4 da5 hex hex ? example: when the dcram address is 2e h . lsb msb da0 da1 da2 da3 da4 da5 0 1 1 1 0 1 note: 5 x 7 dots ... 12 - digit display 5 x 7 dots 5 x 8 dots ... 12 - digit display 4 x 8 dots 5 x 9 dots ... 12 - digit display 3 x 9 dots www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 10 / 3 7 6. 3 . ad ram ( additional data r a m) adram is ram used to store the adata display data. adram has a capacity of 12 x 5 bits, and the stored display data is displayed directly without the use of cgrom or cgram. th e table below lists the correspondence between the 4 - bit adram address loaded into ac and the display position on the lcd panel. ? when the ad ram address loaded into ac is 0 h . (number of digit displayed: 12) display digit 1 2 3 4 5 6 7 8 9 10 11 12 ad ram address(hex) 0 1 2 3 4 5 6 7 8 9 a b however, when the display shift is performed by specifying adata, the adram address shifts as shown below. display digit 1 2 3 4 5 6 7 8 9 10 11 12 adram address(hex) 1 2 3 4 5 6 7 8 9 a b 0 (left shift) display digit 1 2 3 4 5 6 7 8 9 10 11 12 adram address(hex) b 0 1 2 3 4 5 6 7 8 9 a (right shift) note: the ad ram addresses are expres sed in hexadecimal. lsb msb adram address ra0 ra1 ra2 ra3 hex ? example: when the ad ram address is a h . lsb msb ra0 ra1 ra2 ra3 0 1 0 1 note: 5 x 7 dots ... 12 - digit display 5 dots 5 x 8 dots ... 12 - digit display 4 dots 5 x 9 dots ... 12 - digit display 3 dots www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 11 / 3 7 6.4. cgrom (character generator rom) cgrom is rom used to generate the 240 kinds of 5 x 7, 5 x 8, or 5 x 9 dot matrix character patterns from the 8 - bit character codes. cgrom has a capacity of 240 x 45 bits. when a character code is written to dcram, the character pa ttern stored in cgrom corresponding to the character code is displayed at the position on the lcd corresponding to the dcram address loaded into ac. 6.5. cgram (character gen erator ram) cgram is ram to which user programs can freely write arbitrary charac ter patterns. up to 16 kinds of 5 x 7, 5 x 8, or 5 x 9 dot matrix character patterns can be stored. cgram has a capacity of 16 x 45 bits. www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 12 / 3 7 7 . reset function the FD2000 is reset when a low level is applied to the res etb pin at power on and, in normal mode. on a reset the FD2000 create a display with all lcd panels turned off. however, after a reset applications must set the contents of dcram, adram, and cgram before turning on display with a display on/off control instruction since the contents of these m emories are undefined. that is, applications must execute the following instructions. ? set display technique ? dcram data write ? adram data write (if adram is used.) ? cgram data write (if cgram is used.) ? set ac address after executing the above inst ructions, applications must turn on the display with a display on/off control instruction. note that when applications turn off in the normal mode, applications must turn off the display with a display on/off control instruction. (see the detailed inst ruction descriptions.) www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 13 / 3 7 8 . serial data transfer format ? when cl is stopped at the low level ? when cl is stopped at the high level ? address: 47h ? d0 to d63: instruction data the data is acquired on the rising edge of the cl signal and latche d on the falling edge of the ce signal. when transferring instruction data from the microcontroller, applications must assure that the time from the transfer of one set of instruction data until the next instruction data transfer is significantly longer th an the instruction execution time. www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 14 / 3 7 execution time note3 0us 0u s /27us note4 27us 27us 27us 27us 27us d63 1 0 1 0 1 0 1 d62 0 1 1 0 0 1 1 d61 0 0 0 1 1 1 1 d60 0 0 0 0 0 0 0 d59 x bu x ra3 x x x d58 x sc r/l ra2 x x x d57 dt2 a a ra1 x x x d56 dt1 m m ra0 im im x d55 x x x x ca7 d54 x x x x ca6 d53 x da5 da5 x ca5 d52 x da4 da4 x ca4 d51 dg12 da3 da3 ra3 ca3 d50 dg11 da2 da2 ra2 ca2 d49 dg10 da1 da1 ra1 ca1 d4 8 dg9 da0 da0 ra0 ca0 d47 dg8 ac7 x x d46 dg7 ac6 x x d45 dg6 ac5 x x d44 dg5 ac4 ad5 cd45 d43 dg4 ac3 ad4 cd44 d42 dg3 ac2 ad3 cd43 d41 dg2 ac1 ad2 cd42 d40 dg1 ac0 ad1 cd41 d39 cd40 d1 cd2 d0 cd1 9. instruction table instruction set display technique display on/off control display shift set ac address dcram data write note1 adram data write note2 cgram data write x: dont care n otes: 1 . the data format differs when the dcram data write instruction is executed in the increment mode (im = 1 ). (see detailed instruction descriptions .) 2 . the data format differs when the adram data write instruction is executed in the increment mode (im = 1). (see detailed instruction descriptions.) 3 . the execution times listed here apply when fosc = 300 khz. the execution times differ when the oscillator frequency fosc differs. example: when fosc = 210 khz 300 27 s x = 39 s 210 4 . when the power saving mode (bu = 1) is set, the execution time is 27 s (when f osc = 300 khz). www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 15 / 3 7 10 . d etailed i nstruction d escriptions 10.1. set displa y technique D sets the display technique code d56 d57 d58 d59 d60 d61 d62 d63 dt1 dt2 x x 0 0 0 1 x: don t care 10.1.1. dt1, dt2: setting the display technique output pins dt1 dt2 display technique s60/com9 s59/com10 0 0 1/8 duty, 1/4 bias drive s60 s59 1 0 1/9 duty, 1/4 bias drive com9 s59 0 1 1/10 duty, 1/4 bias drive com9 com10 10.2. display on/off contr ol D turns the display on or off code d40 d41 d42 d43 d44 d45 d46 d47 d48 d49 d50 d51 d52 d53 d54 d55 d56 d57 d58 d59 d60 d61 d62 d63 dg1 dg2 dg3 dg4 dg5 dg6 dg7 dg8 dg9 dg10 dg11 dg12 x x x x m a sc bu 0 0 1 0 x: don t care 10.2.1. m, a: specifies the data to be turned on or off m a display operating state 0 0 both mdata and adata are turned off (the display is forcibly turned off regardless of th e dg1 to dg12 data.) 0 1 only adata is turned on (the adata of display digits specified by the dg1 to dg12 data are turned on.) 1 0 only mdata is turned on (the mdata of display digits specified by the dg1 to dg12 data are turned on.) 1 1 both mdata and adata are turned on (the mdata and adata of display digits specified by the dg1 to dg12 data are turned on.) www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 16 / 3 7 10.2.2. dg1 to dg12: specifies the display digit display digit 1 2 3 4 5 6 7 8 9 10 11 12 display digit data dg 1 dg2 dg3 dg4 dg5 dg6 dg7 dg8 dg9 dg10 dg11 dg12 for example, if dg1 to dg6 are 1, and dg7 to dg12 are 0, then display digits 1 to 6 will be turned on, and display digits 7 to 12 will be turned off (blanked). 10.2.3. sc: controls the common and segment output pins sc common and segment output pin states 0 output of lcd drive waveforms 1 fixed at the vss level (all segments off) n ote : when sc is 1, the s1 to s60 and com1 to com10 output pins are set to the vss level, regardless of the m, a, and dg1 to dg12 data. 10.2.4. bu: controls the normal mode and power saving mode bu mode 0 normal mode 1 power saving mode (in this mode, the osci and osco pins oscillator is stopped, and the common and segment pins are set to the vss level. in this mode, instruc tions other than the display on/off control instruction cannot be executed. thus applications must set the lsi to normal mode before executing any of the other instructions.) 10.3. display shift D shifts the display code d56 d57 d58 d59 d60 d61 d62 d6 3 m a r/l x 0 0 1 1 x: don t care 10. 3 .1. m , a : specifies the data to be shifted m a shift operating state 0 0 neither mdata nor adata is shifted 0 1 only adata is shifted 1 0 only mdata is shifted 1 1 both mdata and adata are shifted 10.3.2. r/l : shift direction specification r/l shift direction 0 left shift 1 right shift www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 17 / 3 7 10.4. set ac address D specifies the dcram and adram address for ac code d48 d49 d50 d51 d52 d53 d54 d55 d56 d57 d58 d59 d60 d61 d62 d63 da0 da1 da2 da3 da4 da5 x x ra0 ra1 ra2 ra3 0 1 0 0 x: don t care 10. 4 .1. da0 to da5: dcram address da0 da1 da2 da3 da4 da5 lsb ms b 10.4. 2 . r a0 to r a 3 : ad ram address ra0 ra1 ra2 ra3 lsb msb this instruction loads the 6 - bit dcram address da0 to da5 and the 4 - bit adram address ra0 to ra3 into the ac. 10.5. dcram data write D specifies the dcram address and stores data at that a ddress code d40 d41 d42 d43 d44 d45 d46 d47 d48 d49 d50 d51 d52 d53 d54 d55 d56 d57 d58 d59 d60 d61 d62 d63 ac 0 ac1 ac2 ac3 ac4 ac5 ac6 ac7 da0 da1 da2 da3 da4 da5 x x i m x x x 0 1 0 1 x: don t care 10. 5 .1. da0 to da5: dcram address da0 da1 da2 da3 da 4 da5 lsb msb 10. 5 . 2 . ac 0 to a c7 : dc ram data (character code) a c 0 a c 1 a c 2 a c 3 a c4 a c5 a c6 a c7 lsb msb this instruction writes the 8 bits of data ac0 to ac7 to dcram. this data is a character code, and is converted to a 5 x 7, 5 x 8, or 5 x 9 dot matrix display data using cgrom or cgram. 10. 5 . 3 . im: setting the method of writing data to dcram im dcram data write method 0 normal dcram data write (specifies the dcram address and writes the dcram data.) 1 increment mode dcram data write (incr ements the dcram address by +1 each time data is written to dcram.) www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 18 / 3 7 ? dcram data write method when im = 0 ? dcram data write method when im = 1 (instructions other than the dcram data write instruction cannot be executed.) 10. 5 . 4 . data format at (1) (24 bi ts) code d40 d41 d42 d43 d44 d45 d46 d47 d48 d49 d50 d51 d52 d53 d54 d55 d56 d57 d58 d59 d60 d61 d62 d63 ac0 ac1 ac2 ac3 ac4 ac5 ac6 ac7 da0 da1 da2 da3 da4 da5 x x i m x x x 0 1 0 1 x: don t care 10. 5 . 5 . data format at ( 2 ) ( 8 bits) code d56 d57 d58 d 59 d60 d61 d62 d63 ac0 ac1 ac2 ac3 ac4 ac5 ac6 ac7 10. 5 . 6 . data format at ( 3 ) ( 16 bits) code d48 d49 d 50 d 51 d 52 d 53 d 54 d 55 d 56 d 57 d 58 d5 9 d 60 d 61 d 62 d 63 ac0 ac1 ac2 ac3 ac4 ac5 ac6 ac7 0 x x x 0 1 0 1 x: don t care www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 19 / 3 7 10.6. adram data write D specifies the adram address and stores data at that address code d40 d41 d42 d43 d44 d45 d46 d47 d48 d49 d50 d51 d52 d53 d54 d55 d56 d57 d58 d59 d60 d61 d62 d63 a d1 a d2 a d3 a d4 a d5 x x x r a0 r a1 r a2 r a3 x x x x i m x x x 0 1 1 0 x: don t care 10. 6 . 1 . r a0 to r a 3 : ad ram address ra0 ra1 ra2 ra3 lsb msb 10. 6 . 2 . ad1 to ad5: adata display data in addition to the 5 x 7, 5 x 8, or 5 x 9 dot matrix display data (mdata), this lsi supports direct display of the five accessory display segments provided in ea ch digit as adata. this display function does not use cgrom or cgram. the figure below shows the correspondence between the data and the display. when adn = 1 (where n is an integer between 1 and 5) the segment corresponding to that data will be turned on. 10. 6 . 3 . im: setting the method of writing data to adram im adram data write method 0 normal adram data write (specifies the adram address and writes the adram data.) 1 increment mode adram data write (increments the adra m address by +1 each time data is written to adram.) ? adram data write method when im = 0 www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 20 / 3 7 ? adram data write method when im = 1 (instructions other than the adram data write instruction cannot be used.) 10. 6 . 4 . data format at ( 4 ) (24 bits) code d40 d41 d42 d43 d44 d45 d46 d47 d48 d49 d50 d51 d52 d53 d54 d55 d56 d57 d58 d59 d60 d61 d62 d63 ad1 ad2 ad3 ad4 ad5 x x x ra0 ra1 ra2 ra3 x x x x i m x x x 0 1 1 0 x: don t care 10. 6 . 5 . data format at ( 5 ) ( 8 bits) code d56 d57 d58 d59 d60 d61 d62 d63 a d1 a d2 a d3 a d4 a d5 x x x x: don t care 10. 6 . 6 . data format at ( 6 ) ( 16 bits) code d48 d49 d50 d51 d52 d53 d54 d55 d56 d57 d58 d59 d60 d61 d62 d63 a d1 a d2 a d3 a d4 a d5 x x x 0 x x x 0 1 1 0 x: don t care www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 21 / 3 7 10.7. cgram data write D specifies the cgram address and stores data at that address code d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 d15 cd1 cd2 cd3 cd4 cd5 cd6 cd7 cd8 cd9 cd10 cd11 cd12 cd13 cd14 cd15 cd16 code d16 d17 d18 d19 d20 d21 d22 d23 d24 d25 d26 d27 d28 d2 9 d30 d31 cd1 7 cd 18 cd 19 cd 20 c 21 cd 22 cd 23 cd 24 cd 25 cd 26 cd 27 cd 28 cd 29 cd 30 cd 31 cd 32 code d32 d33 d34 d35 d36 d37 d38 d39 d40 d41 d42 d43 d44 d45 d46 d47 cd33 cd34 cd35 cd36 cd37 cd38 cd39 cd40 cd41 cd42 cd43 cd44 cd45 x x x code d 48 d 49 d 50 d 5 1 d 52 d 53 d 54 d 55 d 56 d 57 d 58 d 59 d 60 d 61 d 62 d 63 ca0 ca1 ca2 ca3 ca4 ca5 ca6 ca7 x x x x 0 1 1 1 x: don t care 10. 7 . 1 . c a 0 to c a 7 : c g ram address c a0 c a 1 c a 2 c a 3 c a 4 c a 5 c a 6 c a 7 lsb msb 10. 7 . 2 . cd1 to cd45: cgram data (5 x 7, 5 x 8, or 5 x 9 d ot matrix display data) the bit cdn (where n is an integer between 1 and 45) corresponds to the 5 x 7, 5 x 8, or 5 x 9 dot matrix display data. the figure below shows that correspondence. the dots for which the corresponding data cdn is 1 will be turned on . cd1 cd2 cd3 cd4 cd5 cd6 cd7 cd8 cd9 cd10 cd11 cd12 cd13 cd14 cd15 cd16 cd17 cd18 cd19 cd20 cd21 cd22 cd23 cd24 cd25 cd26 cd27 cd28 cd29 cd30 cd31 cd32 cd33 cd34 cd35 cd36 cd37 cd38 cd39 cd40 cd41 cd42 cd43 cd44 cd45 note s : 1. cd1 to cd35: 5 x 7 dot matrix display data 2. cd1 to cd40: 5 x 8 dot matrix display data 3. cd1 to cd45: 5 x 9 dot matrix display data www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 22 / 3 7 11 . notes on the power o n and power off sequ ences at power on: log ic block power supply (vdd) on lcd driver block power supply (vlcd ) on at power off: lcd driver block power supply (vlcd) off logic block power supply (vdd) off however, if the logic and lcd driver block use a shared power supply, then the power supplies can be turned on and off at the same time. www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 23 / 3 7 1 2 . lcd drive technique 12.1. 1/8 duty, 1/4 bias d rive technique vlcd vlcd 1 vlcd 2 384 t vss com 2 com 8 lcd driver output when all lcd segments corresponding to com 1 to com 8 are turned off . com 1 lcd driver output when only lcd segments corresponding to com 1 are turned o n . lcd driver output when only lcd segments corresponding to com 2 are turned o n . lcd driver output when all lcd segments corresponding to com 1 to com 8 are turned o n . vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 3072 t t = 1 fosc www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 24 / 3 7 12. 2 . 1/ 9 duty, 1/4 bias driv e technique vlcd vlcd 1 vlcd 2 384 t vss com 2 com 9 lcd driver output when all lcd segments corresponding to com 1 to com 9 are turned off . com 1 lcd driver output when only lcd segments corresponding to com 1 are turned o n . lcd driver output when only lcd segments corresponding to com 2 are turned o n . lcd driver output when all lcd segments corresponding to com 1 to com 9 are turned o n . vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 3456 t t = 1 fosc www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 25 / 3 7 12. 3 . 1/ 10 duty, 1/4 bias driv e technique vlcd vlcd 1 vlcd 2 384 t vss com 2 com 10 lcd driver output when all lcd segments corresponding to com 1 to com 10 are turned off . com 1 lcd driver output when only lcd segments corresponding to com 1 are turned o n . lcd driver output when only lcd segments corresponding to com 2 are turned o n . lcd driver output when all lcd segments corresponding to com 1 to com 10 are turned o n . vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 vlcd vlcd 1 vlcd 2 vss vlcd 3 3840 t t = 1 fosc www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 26 / 3 7 1 3 . sample application c ircuit 13.1. 1/8 duty, 1/4 bias d rive (for use with n ormal panels) 13. 2 . 1/8 duty, 1/4 bias d rive (for use with l arge panels) www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 27 / 3 7 13. 3 . 1/ 9 duty, 1/4 bias driv e (for use wit h normal panels) 13. 4 . 1/ 9 duty, 1/4 bias driv e ( for use with l arge panels ) www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 28 / 3 7 13. 5 . 1/ 10 duty, 1/4 bias driv e (for use with norm al panels) 13. 6 . 1/ 10 duty, 1/4 bi as drive (for use wi th l arge panels) www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 29 / 3 7 14. sample correspondenc e between instructio ns and the display lsb instruction (hex) msb no. d40 to d43 d4 4 to d4 7 d4 8 to d 51 d 52 to d 55 d 56 to d 59 d 6 0 to d 63 display operation power application 1 (initialization with the res etb pin.) initializes the ic. the display is in the off state. set display technique 2 0 8 sets to 1/8 duty 1/4 bias display drive technique dcram data wri te (increment mode) 3 0 2 0 0 1 a writes the display data to dcram address 00h dcram data write (increment mode) 4 6 4 writes the display data f to dcram address 0 1 h dcram data write (increment mode) 5 9 4 writes the display data i to dcram address 0 2 h dcram data write (increment mode) 6 e 4 writes the display data n to dcram address 0 3 h dcram data write (increment mode) 7 5 4 writes the display data e to dcra m address 04h dcram data write (increment mode) 8 3 4 writes the display data c to dcram address 0 5 h dcram data write (increment mode) 9 8 4 writes the display data h to dcram address 0 6 h dcram data write (increment mode) 10 9 4 writes the display data i to dcram address 0 7 h dcram data write (increment mode) 11 0 5 writes the display data p to dcram address 0 8 h dcram data write (increment mode) 12 3 5 writes the display data s to dcram address 0 9 h dcram data write (increment mode) 13 0 2 writes the display data to dcram address 0 a h dcram data write (increment mode) 14 0 2 writes the display data to dcram address 0 b h dcram data write (increment mode) 15 6 4 writes the display data f to dcram address 0 c h dcram data write (increment mode) 16 4 4 writes the display data d to dcram address 0 d h dcram data write (increment mode) 1 7 2 3 writes the display data 2 to dcram address 0 e h dcram data write (increment mode) 18 0 3 writes the display data 0 to dcram address 0 f h dcram data write (increment mode) 19 0 3 writes the display data 0 to dcram address 10 h www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 30 / 3 7 continued from preceding page. lsb instruction (hex) msb no. d40 to d43 d4 4 to d4 7 d4 8 to d 51 d 52 to d 55 d 56 to d 59 d 60 to d 63 display operation dcram data wr ite (increment mode) 20 0 3 writes the display data 0 to dcram address 11 h dcram data write (increment mode) 21 0 2 0 a writes the display data to dcram address 12 h set ac address 22 0 0 0 2 loads the dcram address 00h and the adram address 0h into ac d isplay on/off control 23 f f f x 1 4 f i n e c h i p s turns on the lcd for all digits (12 digits) in mdata d isplay shift 24 1 c f i n e c h i p s f shifts the display (mdata only) to th e left d isplay shift 25 1 c i n e c h i p s f d shifts the display (mdata only) to the left d isplay shift 26 1 c n e c h i p s f d 2 shifts the display (mdata only) to the left d isplay shift 27 1 c e c h i p s f d 2 0 shifts t he display (mdata only) to the left d isplay shift 28 1 c c h i p s f d 2 0 0 shifts the display (mdata only) to the left d isplay shift 29 1 c h i p s f d 2 0 0 0 shifts the display (mdata only) to the left d isplay shift 30 1 c i p s f d 2 0 0 0 shifts the display (mdata only) to the left display on/off control 31 0 0 0 x 8 4 set to power saving mode, turns off the lcd for all digits display on/off control 32 f f f x 1 4 i p s f d 2 0 0 0 turns on the lcd for all digits (12 digits) in mdata set ac address 33 0 0 0 2 f i n e c h i p s loads the dcram address 00h and the adram address 0h into ac x: dont care n ote: this example above assumes the use of 12 digits 5 7 dot matrix lcd. cgram and adram are not used. www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 31 / 3 7 15. FD2000 character fon t (standard) www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 32 / 3 7 1 6 . electrical characteristics 1 6 .1 . absolute maximum ra tings (t a = 25 c , v ss =0v ) parameter symbol conditions ratings unit v dd max v dd C 0.3 to +7.0 v maximum supply voltage v l cd max v lcd C 0.3 to +11.0 v v in1 ce, cl, di, res etb C 0.3 to +7.0 v v in2 osci C 0.3 to vdd + 0.3 v input voltage v in3 vlcd1, vlcd2, vlcd3 C 0.3 to vlcd + 0.3 v v out1 osco C 0.3 to vdd + 0.3 v output voltage v out2 s1 to s60, com1 to com10 C 0.3 to vlcd + 0.3 v i out1 s1 to s60 300 ua output current i out2 com1 to com10 3 ma allowable power dissipation pd max ta = 85c 200 mw operating temperature topr - C 40 to +85 c storage temperature tstg - C 55 to +125 c www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 33 / 3 7 1 6 . 2 . allowable operating ranges ( t a = C 40 to 85c, v ss = 0 v ) ratings parameter symbol conditions min typ max unit v dd v dd 2.7 - 6.0 v operating voltage v lcd v lcd 4.5 - 10.0 v v lcd1 v lcd1 - 3/4 v lcd v lcd v v lcd2 v lcd2 - 2/4 v lcd v lcd v input voltage v lcd3 v lcd3 - 1/4 v lcd v lcd v v ih1 ce, cl, di, res etb 0.8 v dd - 6.0 v i nput high level voltage v ih2 osci 0.7 v dd - v dd v v il1 ce, cl, di, res etb 0 - 0.2 v dd v input low level voltage v il2 osci 0 - 0.3 v dd v recommended external resistance r osc osci, osco - 33 - k ? recommended external capacitance c osc osci, osco - 220 - pf guaranteed oscillation range f osc osc 150 300 600 khz data setup time t ds cl, di 160 - - ns data hold time t dh cl, di 160 - - ns ce wait time t cp ce, cl 160 - - ns ce setup time t cs ce, cl 160 - - ns ce hold time t ch ce, cl 160 - - ns high level clock pulse width t?h cl 160 - - ns low level clock pulse width t?l cl 160 - - ns minimum reset pulse width t wres res etb 1 - - s www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 34 / 3 7 16 . 3. electrical character istics in the allowable ope rating ra nges ratings parameter symbol conditions min typ max unit hysteresis v h ce, cl, di, res etb C 0.1 v dd C v input high level current i ih ce, cl, di, res etb , osci: vi = 6.0 v C C 5.0 a input low level current i il ce, cl, di, res etb , osci: vi = 0 v C 5.0 C C a v oh1 s1 to s60: io = C 20 a v lcd C 0.6 C C v v oh2 com1 to com10: io = C 100 a v lcd C 0.6 C C v output high level voltage v oh3 osco: io = C 500 a v dd C 1.0 C C v v ol1 s1 to s60: io = 20 a C C 0.6 v v ol2 com1 to com10: io = 100 a C C 0.6 v output low level voltage v ol3 osco: io = 500 a C C 1.0 v v mid1 s1 to s60: io 20 a 2/4 v lcd C 0.6 C 2/4 v lcd + 0.6 v v mid2 com1 to com10: io = 100 a 3/4 v lcd C 0.6 C 3/4 v lcd + 0.6 v output middle level voltage note1 v mid3 com1 to com10: io = 100 a 1/4 v lcd C 0.6 C 1/4 v lcd + 0.6 v oscillator frequency f osc osci, osco: rosc = 33 k ? , cosc = 220 pf 210 300 390 khz i dd1 vdd: power saving mode C C 5 a i dd2 vdd: vdd = 6.0 v, output open, fosc = 300 khz C 450 900 a i lcd1 vlc d: power saving mode C C 5 a supply current i lcd2 vlcd: vlcd = 10.0 v, output open, fosc = 300 khz C 200 400 a n ote : excluding the bias voltage generation divider resistor built into the v lcd1 , v lcd2 , and v lcd3 . www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 35 / 3 7 ? voltage divider resistor circuit for bias ? when cl is stopped at the low level ? when cl is stopped at the high level www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 36 / 3 7 17. package dimensions 1 7 .1. 80 - m qfp - 1420 d d 1 e 0 . 2 0 i n d e x ? 1 . 2 0 . 1 0 . 4 0 . 1 d e p t h 2 t o p e - m a r k ? 2 . 0 0 . 1 0 . 2 m a x d e p t h 2 b t m e - m a r k ? 3 . 0 0 . 1 0 . 1 0 . 0 5 d e p t h b a a 2 a 1 a 3 a a b 1 b w i t h p l a t i n g c o m m o n d i m e n s i o n s ( u n i t s o f m e a s u r e = m i l l i m e t e r ) b a s e m e t a l s y m b o l m i n n o m m a x a a 1 a 2 a 3 b b 1 c c 1 d d 1 e e 1 e g 1 d g 1 e l l 1 l 2 0 . 1 0 2 . 6 5 1 . 2 0 0 . 3 2 0 . 3 2 0 . 1 4 0 . 1 4 2 3 . 0 0 1 9 . 9 0 1 7 . 0 0 1 3 . 9 0 0 . 7 0 2 . 7 5 1 . 3 0 0 . 3 5 0 . 1 5 2 3 . 2 0 2 0 . 0 0 1 7 . 2 0 1 4 . 0 0 0 . 8 0 2 1 . 3 0 r e f 1 5 . 3 0 r e f 0 . 6 8 0 . 8 8 1 . 0 8 1 . 6 0 r e f 0 . 2 5 b s c 0 1 1 2 1 3 8 1 5 1 2 3 5 7 3 . 3 0 0 . 4 0 2 . 8 5 1 . 4 0 0 . 4 2 0 . 3 8 0 . 2 0 0 . 1 6 2 3 . 4 0 2 0 . 1 0 1 7 . 4 0 1 4 . 1 0 0 . 9 0 s e c t i o n a a n o t e s : 1 . a l l d i m e n s i o n s r e f e r t o e i a j s t a n d a r d e d 7 3 1 1 a 8 0 0 0 1 p b d o n o t i n c l u d e m o l d f l a s h o r p r o t r u s i o n s . 2 . t h e l e a d f r a m e b a s e m e t a l i s c u . g 1 e o r g 1 d l ( l 1 ) 2 1 www.datasheet.co.kr datasheet pdf - http://www..net/
FD2000 r ev 1 . 0 37 / 3 7 1 7 . 2 . 80 - l qfp - 12 12 0 . 0 8 a a b 1 b c 1 c s e c t i o n a a n o t e s : f l a s h o r p r o t r u s i o n s . t o p e m a r k i n d e x ? 1 . 2 0 0 . 1 0 b t m e m a r k 2 ? 1 . 8 0 0 . 1 0 x 0 . 1 0 0 . 0 5 d 0 . 2 0 0 . 1 0 d e p t h 2 ? 1 . 8 0 0 . 1 0 x 0 . 1 0 0 . 0 5 d e b 0 . 0 8 e 1 e d 1 d 2 ( l 1 ) l l 2 r 2 r 1 + 1 3 w i t h p l a t i n g b a s e m e t a l a 3 a 2 a a 1 a l l d i m e n s i o n s r e f e r t o j e d e c s t a n d a r d m s 0 2 6 b d d d o n o t i n c l u d e m o l d c o m m o n d i m e n s i o n s ( u n i t s o f m e a s u r e = m i l l i m e t e r ) s y m b o l m i n n o m m a x a a 1 a 2 a 3 b b 1 c c 1 d d 1 e e 1 e l l 1 l 2 r 1 l 2 0 . 0 5 1 . 3 5 0 . 5 9 0 . 1 8 0 . 1 7 0 . 1 3 0 . 1 2 1 3 . 8 0 1 1 . 9 0 1 3 . 8 0 1 1 . 9 0 0 . 4 0 1 . 4 0 0 . 6 4 0 . 2 0 0 . 1 2 7 1 4 . 0 0 1 2 . 0 0 1 4 . 0 0 1 2 . 0 0 0 . 5 0 1 . 0 0 r e f 0 3 . 5 1 2 1 1 1 2 1 3 1 . 6 0 0 . 1 5 1 . 4 5 0 . 6 9 0 . 2 7 0 . 2 3 0 . 1 8 0 . 1 3 4 1 4 . 2 0 1 2 . 1 0 1 4 . 2 0 1 2 . 1 0 0 . 6 0 0 . 4 5 0 . 6 0 0 . 7 5 0 . 2 5 b s c 0 . 0 8 0 . 0 8 0 . 2 0 7 1 3 1 2 0 1 1 3 www.datasheet.co.kr datasheet pdf - http://www..net/

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